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Alibaba · released 2026-08-26 · Qwen Community License 1.0 · 125.0 B MoE body (6.0 B active on output) · 48 layers: 12 QSA full-attention + 36 Gated DeltaNet linear · 256K context

Qwen3.8-Flash-Next VRAM requirements

CONSUMER: NO No consumer GPU runs it — the smallest measured build totals 62.4 GiB (weights + a measured overhead anchor; ISTA-DASLab's GSQ-RCO Q2_0, standard precision, n-gram table included — 2× a 24GB card), and every one of the 52 measured builds sits above the 48GB class. The exits are unusually good for a cliff this size: a 128GB appliance runs standard builds Q2_0 through Q4_K_M, one 192GB B200 covers the same for renters, and a 512GB Mac Studio runs everything measured including official BF16 — with the Strata engine (reported) streaming the raw weights on a 32GB-combined PC as the consumer dark horse. The question is not which GPU, but which exit:
Rent cloud GPUs ↓ Appliance form factors ↓ Distill / step-down ladder ↓ Private deployment ↓ Just use the API ↓

Qwen3.8-Flash-Next is Alibaba's hybrid-MoE line in the sand: 48 layers — 12 full-attention QSA, 36 Gated DeltaNet linear — 512 experts per layer (10 routed + 1 shared), 256K context, and a 20M-entry n-gram embedding table that alone outweighs most standalone open models. That table is why sources disagree about its size: the language body is ~125B parameters, the total ~175B once the table is counted — the full caliber note is in the FAQ, and it matters before comparing this model to anything. Released August 26, 2026, it reached a thick supply by the October 20, 2026 sweep — 52 measured builds across eight publishing orgs — and the community's answer to the cliff was not a smaller model but a streaming one: the Strata engine tiers these exact raw weights across RAM, VRAM, and SSD on a 32GB-combined PC (Strata page, engine claims reported). The smaller same-family body is Qwen3.8-27B.

Updated · data status: MEASURED WEIGHTS — totals = measured weights + measured overhead anchor; KV kept out of totals (config-derived provisional: 24,576 B/token — under a GiB at 32K, ≈6 GiB at the full 256K); every weight a pinned file-size sum (official release + five community publishers, all pinned below)

Log-scale runway chart: the smallest build (GSQ-RCO Q2_0, 62.4 GiB total, n-gram table included) sits 2× above a 24GB card's nominal capacity (2.8× its 22.5 GiB usable, the chart's caliber) and above every consumer GPU on the ladder, but inside the 128GB-appliance and single-B200 markers; official BF16 (335.8 GiB) needs 2 B200s; the 512GB Mac Studio clears every measured build.
Every build sits above every consumer card — the smallest (Q2_0, 62.4 GiB, standard precision) is 2× a 24GB card, and no 24–48GB card enters the conversation at any build. The doors: the 128GB boxes (M4 Max / DGX Spark, ~120 GiB usable) fit standard builds Q2_0 through Q4_K_M (111.9 GiB at the top) with real headroom — no lossy conversion involved; a single 192GB B200 covers Q2_0 through Q4_K_M for cloud renters, and 2 cover official BF16 (335.8 GiB); the 512GB M3 Ultra (480 GiB usable, 7.75× the smallest file) runs every measured build including the official release. KV is not the door: config-derived figures (24,576 B/token, provisional) put 32K of cache under a GiB and the full 256K at ≈6 GiB against 60-plus-GiB weight files. Supply as of October 20, 2026: 52 measured builds from the official release plus seven community publishing orgs — the door-setting builds are pinned below.

Rent it: minimal cloud configs (the smallest door in)

Cloud-renter lens: hourly billing, fewest cards first — Q2_0 through Q4_K_M need a single 192GB B200; official BF16 needs 2. Every door below is a measured file sum at a pinned revision; card counts are plain division — see where every number comes from.
QuantizationTotal VRAMMinimal single-node configVerdict
GSQ-RCO Q2_0 (measured)62.4 GiB1× B200 / 1× MI300Xsmallest build · standard precision · n-gram table inside the file
UD-IQ1_S (measured)68.1 GiB1× B200 / 1× MI300Xsmallest dynamic-IM build · unsloth
NVFP4 (nvidia, measured)74.0 GiB1× B200 / 1× MI300Xdatacenter-native Blackwell format · not a consumer door
UD-Q4_K_XL (measured)104.2 GiB1× B200 / 1× MI300Xthe Q4 door · fits the 128GB appliance with room
Q4_K_M (measured)111.9 GiB1× B200 / 1× MI300Xthe standard-precision sweet spot · top of the 128GB fit
BF16 (official Qwen release)335.8 GiB2× B200 / 2× MI300Xthe official build · 131 shards · 2× B200

Card counts are plain division (rounded up) against published per-GPU memory (192GB B200, MI300X class) on measured totals — weights + a measured overhead anchor (llama.cpp discussion #9936); KV stays out of these totals: config-derived figures (24,576 B/token, provisional) put 32K of KV under a GiB next to these weights. One row is a different kind of build: nvidia's NVFP4 (74.0 GiB) is a datacenter-native Blackwell format — measured and pinned, but aimed at B200-class deployment, not a consumer door. Caliber note for this table: every total is a whole-model file sum — the 51.2B-param n-gram table is inside each file set, not a sidecar.

Appliance / unified-memory form factors

The evergreen "can a Mac Studio / DGX Spark run it" family — one row each, answered directly. Here the 128GB boxes take standard-precision builds with real headroom (no lossy door required), and the 512GB box takes everything measured.
ApplianceUnified memoryBest fitVerdict
Mac Studio M3 Ultra512 GBevery measured build fits, official BF16 included (335.8 GiB) — usable is 7.75× the smallest file; Q5-class, Q8_0, and the official release all load with headroomFITS · everything measured, incl. official BF16
Mac Studio M4 Max128 GBstandard builds Q2_0 (62.4 GiB) through Q4_K_M (111.9 GiB) fit — usable is 1.94× the smallest file, with 8-plus GiB of spare at Q4_K_M; Q5-class and up do not fitFITS · Q2_0–Q4_K_M, standard precision
NVIDIA DGX Spark128 GBsame class as the M4 Max row — standard builds Q2_0 through Q4_K_M fit; Q5-class and up do not fitFITS · Q2_0–Q4_K_M, standard precision

The 128GB answer is the good news on this page. The M4 Max / DGX Spark class (~120 GiB usable) fits standard-precision builds from Q2_0 (62.4 GiB) through Q4_K_M (111.9 GiB) with real headroom — 1.94× of usable against the smallest file, and 8-plus GiB of spare at Q4_K_M — and they are the same GGUF files from the rent table, no lossy conversion and no specialized runtime. Q5-class builds and up do not fit the 128GB box. The 512GB M3 Ultra (480 GiB usable, 7.75× the smallest file) runs every measured build including official BF16 (335.8 GiB) with room to breathe. Ratios compare usable memory to the build's measured weights file size (61.9 GiB for the smallest build, before the overhead anchor — not the 62.4 GiB total), both in GiB (binary), the same single-unit division end to end; unified-memory bandwidth trails datacenter GPUs by an order of magnitude, so these are 'it runs' verdicts, not 'it runs fast'.

Can't run it? The distill / step-down ladder

No official Qwen3.8-Flash-Next distill or smaller sibling is tracked in our sources as of October 20, 2026 — and the architecture says a step-down would be a new training run, not a quant: 12 full-attention QSA layers interleaved with 36 Gated DeltaNet linear layers, 512 experts per layer, and the n-gram table are not something you re-quantize away. What exists instead is a hardware step-down with no new weights at all: the Strata engine tiers these exact files across RAM, VRAM, and SSD and states a 32GB-combined door with a 12GB+ card (reported, Strata page). When official smaller siblings ship, each gets its own VRAM page and this section links the ladder.

Step-down options that exist: Qwen3.8-27B — the same family's 27B-body champion, priced for 24GB-class cards, one click away. And the un-shrink answer: Strata runs the raw ~125B-body weights on a 32GB-combined PC by streaming experts instead of shrinking them (reported) — the community's response to this cliff has been engineering, not a smaller model. The also-cliff-class models are linked below.

Private deployment (enterprises, labs, providers)

A separate query family from everything above: reference configs for the hybrid QSA / Gated-DeltaNet stack, compliance and air-gapped installs, TCO modeling against the API. The buyers here are not price-shopping — data residency and license terms decide. On the license: Qwen Community License 1.0 permits commercial use with attribution and draws two lines in its text — products past 100 million monthly active users or 20M USD monthly revenue must display the model name prominently, and MaaS / AI-work-assistant use needs a separate grant (pinned LICENSE below; this page is not legal advice). Capacity is not the problem: one B200 already covers Q2_0 through Q4_K_M, and 2 B200s hold the official build — the question is governance and throughput. Ecosystem note: five orgs publish GGUFs of this model, including ggml-org (the llama.cpp project itself) — the loader-support signal this site tracks — and nvidia publishes a datacenter-native NVFP4 build (74.0 GiB, pinned below). Budget an integration week, not an afternoon, for a private deploy on the qwen4_exp architecture.

Or just use the API

API $/1M (in/out)
live prices via OpenRouter
Self-host monthly
a single 192GB B200 covers every build through Q4_K_M (111.9 GiB) — official BF16 needs 2 of them, which still rents for more per month than most teams' entire API bill

Honest take: Qwen3.8-Flash-Next is a 125.0 B-body MoE with 6.0 B active on output — the shape where hosted APIs are cheapest to run and hardest to beat on cost. The OpenRouter door: the Qwen3.8-family search is linked below, and our October 18, 2026 OpenRouter snapshot enumerates the siblings (qwen3.8-flash, qwen3.8-27b, the qwen3.8-max line) but no flash-next listing — treat hosted availability as provider-dependent and check the provider's live model list before committing code. Self-hosting makes sense when private deployment is the requirement — not to save money — and the Strata page covers the 'my data stays home' middle ground on a 32GB PC (engine claims reported). Prices are linked, not pinned.

Where every number comes from (every figure carries its tag)

Weights: pinned file sizes at pinned revisions. Totals: measured weights + a measured overhead anchor (llama.cpp #9936), whole-model sums with the n-gram table inside. KV stays out of totals: config-derived (24,576 B/token, provisional) — under a GiB at 32K against these weights. The tag table is the legend →
What each number slot is made of. These tags are the legend for every badge on this page: they say what kind of evidence a number is — and what a verdict built on it can claim.
TagSlotWhat it isWhat the verdict can claim
measuredBuild file sizesOfficial 131-shard BF16 safetensors plus community GGUF ladders from unsloth, ISTA-DASLab, bartowski, ggml-org, and lmstudio-community, and nvidia's NVFP4 safetensors — sizes summed at pinned revisions, whole-model sums with the n-gram table inside the files (the vision mmproj sidecar and MTP shards ship separately in the pinned trees and are excluded, per the collection notes). The six door-setting builds are pinned below; the full 52-build ladder lives in this site's supply database.Determinate at each door — a platform above or below a measured file size is a fact, not an estimate.
reportedModel identity (body 125B / 6B active, +51B n-gram, +4B MTP)The model card's own line — '125.0 B with 6.0 B activated, plus 51B n-gram embedding and 4B MTP' — plus the benchmark table, reported and linked, not re-measured by us; our config arithmetic cross-checks the table (20M × 2560 = 51.2B) and the body count. The HF page auto-displays the widest caliber once everything is counted — the FAQ carries the caliber note.Identity and benchmark claims track the linked pages.
provisionalTotals (weights + overhead)Simple addition: measured weights + a measured overhead anchor (llama.cpp discussion #9936, same site-wide anchor as every page). KV stays out: config-derived figures (24,576 B/token for the 12 full-attention layers; the 36 Gated-DeltaNet layers hold a constant recurrent state) put 32K of KV under a GiB and the full 256K at ≈6 GiB next to these weights.The overhead line is a rounding-level term next to these weights; at 2× of a 24GB card on the smallest build, no door verdict moves on it.
provisionalCloud card countsSimple division (rounded up) against published per-GPU memory (192GB B200, MI300X class — vendor spec pages).Card counts follow arithmetically once totals are set.
reportedRelease facts (2026-08-26, license terms)Public release date of August 26, 2026 from same-week external coverage (the HF repo was created August 24; the card references an official technical report); Qwen Community License 1.0 terms quoted from the pinned LICENSE file — attribution duty, the 100M-MAU / 20M-USD lines, and the MaaS carve-out.Version and license claims track the linked pages, not our measurement.
reportedAPI availabilityThe OpenRouter link is a Qwen3.8-family search: our October 18, 2026 snapshot enumerates the siblings but no flash-next listing, so the API door is stated as provider-dependent (details in the API section and FAQ).Tracks the linked search and snapshot — check the provider's live list before committing.
Pinned sources — every row clickable, dated.
ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF @ ed59f920 (GSQ-RCO Q2_0 61.9GiB)pinned treeaccessed 2026-10-19
unsloth/Qwen3.8-Flash-Next-GGUF @ 766911a6 (UD-IQ1_S 67.6GiB / UD-Q4_K_XL 103.7GiB)pinned treeaccessed 2026-10-19
bartowski/Qwen3.8-Flash-Next-GGUF @ db3a1857 (Q4_K_M 111.4GiB)pinned treeaccessed 2026-10-19
nvidia/Qwen3.8-Flash-Next-NVFP4 @ fc694b54 (NVFP4 (10 shards, MTP sidecar excluded) 73.5GiB)pinned treeaccessed 2026-10-19
Qwen/Qwen3.8-Flash-Next @ de4b8e4d (official BF16 (131 shards) 335.3GiB)pinned treeaccessed 2026-10-19
Qwen3.8-Flash-Next model card (pinned README: 'Number of Parameters: 125B with 6B activated, plus 51B n-gram embedding and 4B MTP', benchmark table, technical-report reference)reportedaccessed 2026-10-20
Official config.json (pinned: 48 layers = 12 full-attention QSA + 36 Gated DeltaNet linear; 512 experts/layer, 10 routed + 1 shared; 256K context; n-gram table 20M × 2560 — the basis for the 24,576 B/token KV derivation)reportedaccessed 2026-10-20
Qwen Community License 1.0 (pinned LICENSE: commercial use with attribution; 100M-MAU / 20M-USD monthly revenue display duty; MaaS / AI-work-assistant separate grant)reportedaccessed 2026-10-20
datanorth.ai coverage, 2026-08-27 ('released Qwen3.8-Flash-Next on 26 August 2026') — public release-date evidence (HF repo createdAt is 2026-08-24, two days earlier)reportedaccessed 2026-10-20
HF repo stats — official repo downloads 2,494,099 · likes 6,345 (snapshot of the supply sweep; the five community publishers' own counters are in the collection notes)liveaccessed 2026-10-20
ggml-org/llama.cpp discussion #9936 (runtime overhead anchor)measuredaccessed 2026-10-20
OpenRouter — Qwen3.8-family search (our 2026-10-18 snapshot enumerates qwen3.8-flash / qwen3.8-27b / the qwen3.8-max line but no flash-next listing; provider-dependent, check the live model list)liveaccessed 2026-10-18
sgl-project/sglang issue #37792 (September 3, 2026 — community recipe: 2-bit AutoRound conversion + host-RAM offload serving Qwen3.8-Flash-Next on one 24GB GPU with 32GB host RAM, ~54–57 tok/s decode at full 262K context; companion repo HaberstrohSystems/qwen3.8-flash-next-24gb-sglang)reportedaccessed 2026-10-20

FAQ

What is Qwen3.8-Flash-Next?

Alibaba's hybrid-MoE release of August 26, 2026 (public release date per same-week coverage; the HF repo was created August 24, and the model card points at an official technical report). The pinned config: 48 layers in repeating groups of three Gated-DeltaNet linear layers and one full-attention QSA layer, 512 experts per layer with 10 routed plus 1 shared active, a 256K context, an MTP layer, vision input, and the 20M-entry n-gram embedding table at layer 2. The model card's own parameter line reads 'Number of Parameters: 125B with 6B activated, plus 51B n-gram embedding and 4B MTP' — in this site's caliber that is a ~125.0 B language body with ~6.0 B active, plus the 51.2B-parameter n-gram table, and the config's model_type — qwen4_exp — is the release-name mapping for the Qwen4-Exp architecture, which is how external tooling refers to it. License: Qwen Community License 1.0 (commercial use with attribution; two carve-outs quoted in the deployment section and pinned below). Supply at the October 20, 2026 sweep: 52 measured builds across eight publishing orgs — the official 131-shard BF16 release; GGUF ladders from unsloth, ISTA-DASLab, bartowski, ggml-org, and lmstudio-community; NVFP4 datacenter builds from nvidia and RadixArk.

Is Qwen3.8-Flash-Next a 125B or a 175B model?

You will see three numbers for its size, and all three are correct at their own boundary. The language body — attention stacks, experts, shared expert, embeddings — is ~125B parameters: the model card's headline, and our config arithmetic lands within a rounding of it. Add the n-gram embedding table — 20M entries × 2560 dims = 51.2B parameters, bigger than most standalone open models — and the total is ~175B. Count the MTP layer and the vision tower as well and the widest caliber is ~180B, which is what the HF page tends to auto-display. The table is not an appendix: it participates at layer 2 of every forward pass, and it is inside every file sum priced on this page. So, one caliber sentence for comparing apples to apples: the body is ~125B parameters, the total is ~175B including the 51.2B n-gram embedding table — when a source says '125B' or '180B', check which boundary it counts first.

Can Qwen3.8-Flash-Next run on an RTX 4090 or 5090?

No — and not on any 24–48GB card. The smallest measured build is ISTA-DASLab's GSQ-RCO Q2_0 at 62.4 GiB total (2× the 4090's 24GB, 2× the 5090's 32GB), and every one of the 52 measured builds sits above the 48GB class. No published build file fits a 24–48GB card — but two engine arrangements run it there anyway, both reported rather than files: Strata tiers the raw weights across RAM, VRAM, and SSD behind a stated 32GB-combined door, and a community SGLang recipe (sgl-project issue #37792, September 3, 2026) serves a 2-bit AutoRound conversion on one 24GB GPU with 32GB of host RAM at ~54–57 tok/s decode (reported, linked below). The working exits: a 128GB appliance runs standard builds Q2_0 through Q4_K_M; one 192GB B200 covers the same builds for renters; a 512GB Mac Studio runs everything measured including official BF16; or the API.

How many GPUs do you need to run Qwen3.8-Flash-Next?

One 192GB B200 covers Q2_0 through Q4_K_M — from 62.4 GiB up to 111.9 GiB — and official BF16 (335.8 GiB) needs 2. Card counts are plain ceiling division on measured totals (pinned below); a full 5× B200 node is a throughput choice, not a capacity requirement. MI300X nodes divide the same way at the same per-GPU memory class. Renting one B200 to serve a 6B-active MoE is usually worse economics than the API unless residency is the point — this is the one case where the appliance section beats the cloud section.

Can a Mac Studio run Qwen3.8-Flash-Next?

Yes — both boxes, and without lossy conversions. The 128GB class (~120 GiB usable; M4 Max / DGX Spark included) fits standard builds Q2_0 (62.4 GiB) through Q4_K_M (111.9 GiB) with 8-plus GiB of spare at the top — the same GGUF files from the rent table, no special runtime. The 512GB M3 Ultra (480 GiB usable) runs every measured build including the official BF16 release at 335.8 GiB. The caveat that applies to every unified-memory row on this site: bandwidth trails datacenter GPUs by an order of magnitude, so treat these as 'it runs' verdicts — long-context prefill is where you'll feel it. KV stays small next to these weights: config-derived figures put 32K of cache under a GiB even before the linear layers' constant state is counted.

Is there a smaller version — or a way to run it on a 32GB PC?

No official distill or smaller sibling is tracked in our sources as of October 20, 2026 — and with this architecture (12 full-attention + 36 linear layers, 512 experts per layer, the n-gram table) a step-down is a new training run, not a quant. Two real answers exist. Model step-down: Qwen3.8-27B, the same family's 27B-body champion, priced for 24GB-class cards. Hardware step-down: the Strata engine (product wrapper, all claims reported) tiers these exact raw weights across RAM, VRAM, and SSD — only 10 of each layer's 512 experts resident at a time — and states a door of 32GB of RAM and VRAM together with a single 12GB+ card. That is the pattern this model started: the community's answer to the cliff was streaming the weights, not shrinking them.

Which loaders and apps run Qwen3.8-Flash-Next?

The GGUF supply is broad and current — five publishing orgs as of October 20, 2026, including ggml-org (the llama.cpp project itself) and lmstudio-community (the LM Studio ecosystem channel); that breadth is the loader-support signal this site tracks. nvidia's NVFP4 build is the datacenter-native outlier — a Blackwell-oriented safetensors release for B200-class deployment rather than a desktop file. The official 131-shard BF16 safetensors is the Transformers path. An Ollama library listing is outside this page's enumerated sources as of October 20, 2026 — if Ollama support matters to you, check the library directly. Whichever path you pick, re-verify against the pinned trees below before budgeting hardware.

Which API name serves Qwen3.8-Flash-Next?

Provider-dependent — check before you code against it. Our OpenRouter snapshot of October 18, 2026 enumerates the qwen3.8 siblings (qwen3.8-flash, qwen3.8-27b, the qwen3.8-max line) but no flash-next listing, so the family search linked below may or may not resolve to these exact weights at a given provider. This page answers for the files; the API section links the search. Where a provider does serve it under an alias, the provider's live model list — not the name — is the source of truth for which build you get.